Pages of Understanding the Apple II - Ch. 3 - Timing Generation and the Video Scanner

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• page 3-1
  • timing generation and the video structure
• page 3-2
  • functional flow: the timing generator and the video scanner
  • timing overview
• page 3-3
  • apple frequencies
  • timing signals
• page 3-4
  • durations and frequencies of timing signals
  • timing diagrams
• page 3-5
  • idealized timing diagram for the timing generator
  • timing diagram for the timing generator, showing propogation delay
• page 3-6
  • 14M, 7M and color reference
  • detailed description of the timing signals
  • phase 0 and phase 1
• page 3-7
  • propogation delay hierarchy
• page 3-8
  • distribution of timing generator outputs
• page 3-9
  • RAS. AX, CAS and Q3
  • the 6502 machine cycle slightly lags the phase 0 clockpulse
• page 3-10
  • LDPS and LD194
  • television scanning
  • the video scanner
• page 3-11
  • horizontal scanning
  • vertical scanning
• page 3-12
  • eurapple and the video scanner
  • the long cycle
  • timing generator hardware
• page 3-13
  • schematic: the timing generator
• page 3-14
  • schematic: the video scanner
• page 3-15
  • video scanner hardware
• page 3-16
  • assembler listing: a screen splitting program
  • switching screen modes in timed loops
• page 3-17
• page 3-18
  • apple timing loops
• page 3-19
  • detecting television sync
• page 3-20
  • circuit to generate a 6502 interrupt 416 cycles before the start of the screen display
• page 3-21
  • circuit to seperate a vertical sync pulse from the television sync signal of pin 19 at slot 7
• page 3-22
  • circuit that duplicates the vertical section of the video scanner
• page 3-23
• page 3-24
  • assembler listing: syncronizing the video scan simulator
• page 3-25
  • a programmable interrupter - it generates an interrupt before any one of 256 selected horizontal lines
• page 3-26
  • a programmable video interrupter card